1. Field of the Invention
The present invention relates generally to a power converter, and more specifically, to a power converter emulating a peak current mode control where on-times of the switch for coupling or decoupling a load to or from a power source is determined by a primary peak current of the power converter.
2. Description of the Related Art
Control schemes for controlling power converters include, among other schemes, peak current mode control. The peak current mode control is a control scheme especially advantageous to high power applications. In the peak current mode control scheme, a power converter controller detects the primary current in a primary side of the power converter and controls the duty cycle of a pulse signal in the primary side of a transformer turning a switch on and off in order to regulate the secondary output voltage and current.
FIG. 1 shows a schematic diagram of a conventional flyback power converter 100 operating in the peak current mode. The power converter of FIG. 1 includes, among other components, a DC power source 102, a transformer 120, a switch Q1, a pulse signal generator 110, a diode 122 coupled to the secondary winding 138 of the transformer 120, and a capacitance Co 124, a sense resistor Rsense 140, and a comparator 116. The DC power source 102 provides a DC input voltage of Vg. The transformer 120 includes a primary winding 136 and a secondary winding 138. The switch Q1 is coupled to the primary winding 136 of the transformer 120. The voltage VIP 128 across the sense resistor Rsense 140 represents a current in the primary side of the transformer 120. The pulse signal generator 110 receives a clock signal 134 for generating a pulse signal 114 to the switch Q1. The sense resistor 140 is placed between the switch Q1 and ground. The comparator 116 generates an output signal Vcomp 126 in response to a voltage VIP across the sense resistor Rsense 140 and a control voltage Vc 142 generated by an integrator 118. The control voltage Vc 142 represents an integrated value of an error voltage between a reference voltage Vref 132 and a scaled output voltage Vo. The peak current mode control is accomplished by the comparator output signal Vcomp 126 turning high when the voltage VIP 128 reaches a threshold defined by the control voltage Vc 142, which in turn resets the pulse signal generator 110 and turns off the switch Q1. In the conventional power converter, the pulse signal generator 110, the comparator 116, and the integrator 118 are integrated into a switching controller chip 150.
FIG. 2 shows a timing diagram for signals of the conventional power converter 100 of FIG. 1. Referring to FIGS. 1 and 2, after a switching cycle is started by a clock signal 210, the pulse signal generator 110 generates a pulse signal 114 that alternately turns the switch Q1 on and off. The duration of on-times and off-times of the switch Q1 is controlled so that the power converter operates in peak current mode control. Specifically, the voltage VIP satisfies the equation of VIP=Vg/LM×T (where LM is the magnetizing inductance of the transformer 120, and T is the time period during which the switch is turned on). Therefore, the voltage VIP 128 (representing the primary current ip) rises linearly during an on-time Ton1 until it reaches the control voltage Vc 142, at which point the comparator output signal Vcomp 126 turns high 220. The high pulse 220 in a comparator signal Vcomp 126 resets the pulse signal generator 110. Once the pulse signal generator 110 is reset, the switch Q1 is turned off for the remaining switching cycle Toff1. Another clock signal 212 restarts the subsequent switching cycle (denoted by Ton2 and Toff2) of the pulse signal generator 110.
Short circuit protection and overload protection can be implemented in the conventional power converter by setting a maximum control voltage Vc(max). As shown in FIG. 2, if the load is short-circuited or overloaded after a first switching cycle (denoted by Ton1 and Toff1), Vc may increase in the second switching cycle (denoted by Ton2 and Toff2). If Vc is allowed to increase without setting a limit, the transformer 120 may fail to reset and saturation of the transformer may occur after a number of switching cycles. The saturation of the transformer can in turn cause an excessive current in the switch Q1 and damage the switch Q1. In the conventional power converter operating in the peak current mode control, however, Vc is not increased above Vc(max) in the second switching cycle; and therefore, the on-time Ton2 of the switch Q1 does not extend beyond a certain limit. Because the on-time Ton is not increased beyond the limit, saturation of the transformer 120 is prevented even when short-circuit or overload of the load occurs.
In order to implement peak current mode control, the resistor Rsense 140 is used to sense the primary peak current ip. The resistor Rsense 140 for sensing the primary peak current ip, however, reduces efficiency and reliability of the power converter 100, increases the size of the power converter and adds cost to manufacturing of the power converter. A typical Rsense resistor 140 required for a 5 watt power converter is in the range of 1 to 3 ohms. The power loss from the sense resistor Rsense equals IP—RMS2×Rsense (where IP—RMS is RMS (Root Mean Square) current in the sense resistor Rsense), and this accounts for about 2% efficiency loss in the power converter. Moreover, the resistor Rsense reduces the reliability of the power converter because the Rsense consumes a large amount of power and generates heat.
Therefore, there is a need for a power converter that can emulate a peak current mode control without using a resistor to sense the primary current. There is also a need for a power converter that can increase the efficiency and reliability of the peak current mode control while reducing the size and cost of manufacturing the power converter.